47.03.03 · theoretical-cs / advanced-complexity

AC0 and TC0: Parity Lower Bounds, Threshold Gates, and Circuit Separations

shipped3 tiersLean: nonepending prereqs

Anchor (Master): Arora & Barak 2009 Computational Complexity: A Modern Approach (Cambridge) §14.1-14.4 (Håstad's switching lemma with tight bounds, Razborov-Smolensky method for AC0[p] lower bounds, the ACC0 frontier)

Intuition Beginner

A committee of people is trying to reach a decision. They can only communicate in a fixed number of rounds. In each round, any person can gather information from any number of others, but the total number of people and rounds is limited. The question is: what decisions can this committee make?

A Boolean circuit is like this committee. It consists of gates connected by wires. AND gates check if all inputs are true. OR gates check if any input is true. NOT gates flip a single input. The depth of a circuit is the maximum number of gates on any path from input to output. The size is the total number of gates.

A constant-depth circuit has a fixed number of layers, no matter how many inputs there are. The gates in each layer can have any number of inputs (unbounded fan-in). This is the class AC0.

The parity function checks whether the number of 1s in the input is odd. It is one of the simplest Boolean functions you can imagine. Yet it turns out that AC0 circuits cannot compute parity efficiently. No matter how you arrange a constant number of layers of AND and OR gates, you need an enormous number of gates to get parity right on all inputs.

This is surprising. Parity is easy to compute with a simple loop: just flip a bit for every 1 you see. But a constant-depth circuit cannot "loop." It must compute its answer in a fixed number of rounds, and this restriction is devastating for parity.

The proof uses random restrictions. Imagine randomly freezing most of the inputs to fixed values. After the restriction, the circuit should simplify dramatically (many gates become constants). But parity does not simplify: after freezing inputs, the remaining function is still parity on the unfrozen inputs. This mismatch between how much the circuit simplifies and how much parity does not is the key to the lower bound.

Visual Beginner

An AC0 circuit computing a function on 6 inputs at depth 3:

          Output (AND)
         /     |     \
       OR     OR     AND
      /|\    /|\    / | \
     AND OR  AND OR AND OR
     ||| ||| ||| ||| ||| |||
     x1 x2 x3 x4 x5 x6

Parity on 6 inputs: 000001 1, 000011 0, 000111 1, etc.

Input Parity AC0 depth-2?
000000 0 Possible
000001 1 Possible
101010 0 Hard
111111 0 Hard
bits Exponential size needed

The circuit hierarchy:

AC0  ⊂  TC0  ⊆  NC1  ⊆  L  ⊆  P

AC0:   AND, OR, NOT gates, constant depth, poly size
TC0:   MAJORITY gates, constant depth, poly size
NC1:   Bounded fan-in, O(log n) depth, poly size

Parity is in TC0 (using a majority gate to count 1s) and in NC1 (using a tree of XOR gates), but not in AC0.

Worked example Beginner

We sketch why parity is hard for depth-2 circuits.

A depth-2 AC0 circuit is either a DNF (an OR of ANDs) or a CNF (an AND of ORs). Consider a DNF for parity on bits. Each AND term tests for a specific pattern of inputs. To compute parity correctly, the DNF must accept exactly the strings with an odd number of 1s.

There are strings with an odd number of 1s. A single AND term of width (using variables) covers strings. So to cover all odd-parity strings, we need at least terms. But if is small, the terms do not discriminate enough, and some even-parity string gets accepted. If is large (close to ), we need many terms — the size becomes exponential.

For depth , the argument is more involved but follows the same principle: each additional layer of alternation helps, but not enough to bring the size down to polynomial for parity. The Håstad switching lemma quantifies this precisely.

Check your understanding Beginner

Formal definition Intermediate+

Definition (circuit classes).

  • : languages decided by circuit families where each has inputs, polynomial size , constant depth , and unbounded fan-in AND, OR, NOT gates.
  • : same as AC0 but with MAJORITY gates (output 1 iff ) in addition to AND, OR, NOT.
  • : AC0 with MOD gates (output 1 iff ).
  • .

Definition (parity function). .

Definition (random restriction). A -random restriction independently sets each variable to 0 with probability , to 1 with probability , and leaves it unset with probability . The restricted function is with the fixed substitutions applied.

Theorem (Håstad's switching lemma). Let be a -DNF over variables and a -random restriction with . Then:

\Pr[\text{f|_\rho cannot be written as a k-CNF}] \le (5pk)^k.

Proof sketch. For each -DNF, the restriction sets most variables. The surviving variables are few. A case analysis shows that if the restriction does not simplify to a -CNF, there must be many "bad" terms, and the probability of this decays exponentially. The key lemma counts the number of restrictions that leave requiring more than terms of a CNF: this number is bounded by a combinatorial quantity that yields the desired probability bound.

Theorem (parity lower bound). Any depth- AC0 circuit computing requires size .

Proof. Apply the switching lemma times. At each step, a -DNF (or -CNF) is converted to a -CNF (or -DNF) via a random restriction. After applications, the circuit has been simplified to a depth-1 function (a single AND or OR), but parity after random restrictions still computes parity on variables. If the circuit had size , the switching lemma succeeds at each step with high probability only if is small. Setting and optimising gives .

Counterexamples to common slips

  • "AC0 is the class of all polynomial-size circuits." No. AC0 requires constant depth. General polynomial-size circuits (with unbounded depth) can compute all of P.

  • "Parity is not computable at all." Parity is easily computable by a linear-size circuit of XOR gates. The lower bound says only that AC0 circuits (constant depth, AND/OR/NOT gates) need exponential size.

  • "The switching lemma applies to any circuit." The switching lemma applies to DNF/CNF formulas. For general circuits, it is applied layer by layer, peeling off one layer at a time using the DNF/CNF representation of each gate's function.

Key theorem with proof Intermediate+

Theorem (Furst-Saxe-Sipser / Ajtai parity lower bound). PARITY AC0. More precisely, any depth- circuit computing has size .

Proof. We use the random restriction method. Let be a depth- circuit of size computing parity. Choose and .

Apply a -random restriction to simplify the bottom two layers. Each bottom gate is a small DNF or CNF. By the switching lemma, with probability at least , all bottom gates simplify to depth-1 functions, reducing the circuit depth by 1.

Repeat for more restrictions , each time reducing the depth by 1. After restrictions, the circuit has depth 1: it is a single AND or OR of literals.

After all restrictions, the surviving variables number roughly . But the switching lemma does not set all variables. A more careful analysis shows that variables survive with high probability.

The parity function restricted to surviving variables is still parity on those variables. But a depth-1 function (AND or OR) cannot compute parity on variables. This is a contradiction unless .

Bridge. The parity lower bound builds toward the broader program of circuit complexity as a method for proving lower bounds against uniform classes: the central insight is that random restrictions exploit the locality of constant-depth circuits (each gate sees only bounded logical depth) while preserving the global sensitivity of parity. This appears again in 47.03.05 where the PCP theorem uses related probabilistic techniques (random testing and error amplification) to characterise NP by locally checkable proofs. The foundational reason the parity lower bound matters beyond AC0 is that it generalises to show and for distinct primes , putting these together with the Razborov-Smolensky method gives a family of oracle separations relative to circuit classes, and this is exactly what makes circuit lower bounds the primary technical tool for attacking the P-vs-NP question from below.

Exercises Intermediate+

Lean formalization Intermediate+

Mathlib has no formalisation of Boolean circuits, circuit complexity classes (AC0, TC0, NC1), or the switching lemma. The foundational gap is the absence of a Circuit.Boolean typeclass with size and depth parameters, a formalisation of random restrictions as probability distributions on partial assignments, and the Håstad switching lemma as a proved theorem. The parity lower bound would require formalising the entire random-restriction argument, which is a significant undertaking. This unit ships without a lean_module.

Advanced results Master

Three frontiers in circuit complexity extend the parity lower bound.

Theorem 1 (Razborov-Smolensky). For distinct primes , . Moreover, [Arora & Barak §14.4].

The proof uses the polynomial method over : every AC0[q] circuit of depth and size can be approximated by a degree- polynomial over . But MOD requires degree over (since has characteristic , the polynomial cannot represent the residue classes mod ). This gives an exponential lower bound.

Theorem 2 (Williams' ACC0 lower bound). (Ryan Williams, 2011). This was the first superpolynomial lower bound against ACC0 for any explicit function. The proof uses the algorithmic method: a faster-than-brute-force SAT algorithm for ACC0 circuits would imply a collapse of NEXP, so the nonexistence of such an algorithm gives the lower bound.

Theorem 3 (frontier: TC0 vs NC1). It is open whether . Addition and multiplication of integers, division, and sorting are all known to be in TC0. If , then these operations can be performed in parallel time with bounded fan-in gates. The best known lower bound against TC0 is for the majority function in restricted models.

Synthesis. The parity lower bound is the foundational reason that circuit complexity provides concrete separations between computational models: the central insight is that constant-depth circuits with AND/OR/NOT gates have limited computational power due to their inability to maintain global sensitivity under random restrictions. This builds toward the Razborov-Smolensky theorem which extends the separation to AC0[p] versus AC0[q] for distinct primes, and appears again in 47.03.05 where the PCP theorem uses probabilistic techniques to show that NP proofs can be verified by reading only a constant number of bits — a depth-1 circuit-like restriction on proof access. The generalises from the specific parity function to a systematic understanding of which functions require depth versus size, and putting these together with the ACC0 frontier shows that circuit lower bounds are the most productive approach to the P-vs-NP question from below, even though the frontier remains at ACC0 and the full P-vs-NP separation via circuits is still open.

Full proof set Master

Proposition 1 (switching lemma bound). Let be a -DNF formula. Under a -random restriction with , the probability that cannot be written as a -CNF is at most .

Proof sketch. Let where each is a conjunction of at most literals. Consider a restriction that leaves variables unset. The restricted formula is a -DNF on variables. By the dual version of the switching lemma, fails to be a -CNF only if there exist terms whose variables are all unset by and which together form a "bad" configuration. The number of such configurations is bounded by , and each requires the restriction to unset all involved variables. Since the probability of unsetting a variable is , the total failure probability is at most for the appropriate choice of .

Proposition 2 (parity requires exponential AC0 size). Any depth- AC0 circuit computing requires size .

Proof. Let be a depth-, size- circuit computing parity. Set and for a small constant . Apply successive random restrictions with parameter . After each restriction, apply the switching lemma to simplify the bottom layer. The probability that the switching lemma fails at any step is at most .

For this probability to be less than 1 (so the simplification succeeds for at least one restriction sequence), we need . Substituting and :

For this to be small, we need , which holds for large . The size bound becomes .

Connections Master

  • 47.03.02 — Boolean circuit fundamentals (size, depth, fan-in) provide the definitions on which AC0 and TC0 are built.

  • 47.02.04 — The polynomial hierarchy is connected to circuit complexity via the Karp-Lipton theorem and the observation that AC0 lower bounds imply PH non-collapse.

  • 47.03.05 — The PCP theorem uses techniques related to the switching lemma (random restrictions and error amplification) in its proof.

  • 47.03.01 — BPP is contained in by the Sipser-Gacs-Lautemann theorem, which uses a construction related to circuit approximation.

  • 47.05.03 — Miller-Rabin primality testing places primality in coRP BPP , and the circuit complexity of primality testing is a related open question.

Historical & philosophical context Master

The parity lower bound was proved independently by Merrick Furst, James Saxe, and Michael Sipser (1981) and Miklós Ajtai (1983). Both groups used the random restriction method, though Ajtai's proof was more general. Johan Håstad (1986) refined the switching lemma to give the optimal bound of , which matches an upper bound construction.

Alexander Razborov (1987) introduced the polynomial method for circuit lower bounds, proving that majority is not in AC0[2]. Roman Smolensky (1987) extended this to show that MOD is not in AC0[q] for distinct primes . The Razborov-Smolensky method remains the strongest general technique for AC0[p] lower bounds.

Ryan Williams' 2011 breakthrough showed that NEXP is not contained in ACC0, the first superpolynomial lower bound against any circuit class beyond AC0. His proof used the "algorithmic method": instead of proving lower bounds directly, he showed that faster circuit-analysis algorithms would imply collapses of complexity classes that are known not to collapse [Arora & Barak §14.4].

The philosophical lesson of the parity lower bound is that computational limitations can be proved by probabilistic methods: random restrictions exploit the difference between the average-case behaviour of circuits and functions, even though the lower bound is worst-case. This bridges combinatorial analysis and complexity theory in a way that has proved remarkably productive.

Bibliography Master

@book{arora2009computational,
  author    = {Arora, Sanjeev and Barak, Boaz},
  title     = {Computational Complexity: A Modern Approach},
  publisher = {Cambridge University Press},
  year      = {2009},
}
@article{hastad1986computational,
  author  = {H{\aa}stad, Johan},
  title   = {Computational Limitations for Small-Depth Circuits},
  journal = {MIT Press},
  year    = {1986},
  note    = {PhD thesis, also published as monograph}
}
@inproceedings{furst1981parity,
  author    = {Furst, Merrick L. and Saxe, James B. and Sipser, Michael},
  title     = {Parity, Circuits, and the Polynomial-Time Hierarchy},
  booktitle = {Proceedings of the 22nd IEEE Symposium on Foundations of Computer Science},
  pages     = {260--270},
  year      = {1981},
}
@article{razborov1987lower,
  author  = {Razborov, Alexander A.},
  title   = {Lower Bounds on the Size of Constant-Depth Networks Over a Complete Basis with Logical Addition},
  journal = {Matematicheskie Zametki},
  volume  = {41},
  number  = {4},
  pages   = {598--607},
  year    = {1987},
}
@inproceedings{williams2011non,
  author    = {Williams, Ryan},
  title     = {Non-Uniform {ACC} Circuit Lower Bounds},
  booktitle = {Proceedings of the 26th IEEE Conference on Computational Complexity},
  pages     = {115--125},
  year      = {2011},
}